FRIDAY, OCTOBER 2, 2026
s390
s390: Enforce register pair constraints for mvcl instruction
Assembler now enforces register pair constraints for s390 mvcl instruction.
This commit updates the s390 assembler to enforce architectural constraints on the register operands for the mvcl instruction. It ensures that both R1 and R2 operands designate an even-odd pair of general registers and are even-numbered registers, preventing specification exceptions.
In Details
This patch modifies the s390 assembler to enforce the architectural requirements for the mvcl instruction's R1 and R2 operands. It ensures they form even-odd register pairs and are even-numbered registers, aligning with the z/Architecture Principles of Operation and preventing specification exceptions.
For Context
- s390
- A family of mainframe computer architectures developed by IBM.
- assembler
- A program that translates assembly language into machine code.
- register pair
- On some architectures, certain instructions require two adjacent registers to function as a single, wider operand. For example, an even-numbered register and the immediately following odd-numbered register can form a pair.
- specification exception
- An error condition detected by the hardware when an instruction is executed with operands or conditions that violate the architecture's rules.
- mvcl
- A s390 machine instruction for move character.