RISC-V: Add support for XAndesVSIntLoad extension
Binutils now supports the RISC-V XAndesVSIntLoad extension for vector load operations.
This commit adds support for the RISC-V XAndesVSIntLoad extension, which handles vector load operations for INT4 data into 8-bit elements. The changes update BFD for ELF compatibility, GAS for assembler syntax and tests, and the opcode library for instruction recognition. This enables the use of specialized vector load instructions for improved data handling efficiency.
In Details
This change enables support for the XAndesVSIntLoad extension within the RISC-V binutils. It updates BFD's riscv_multi_subset_supports functions to recognize the extension, modifies GAS for new assembly directives and test cases, and augments the opcode tables and instruction classes in opcode/riscv-opc.c and include/opcode/riscv.h. This addition facilitates the toolchain's support for Andes-specific vector load instructions.
- XAndesVSIntLoad
- A RISC-V extension from Andes Technology that provides instructions for loading vector data, specifically INT4 data into 8-bit elements.
- RISC-V
- An open-standard Instruction Set Architecture (ISA) based on Reduced Instruction Set Computer principles.
- BFD
- The Binary File Descriptor library, used by binutils to handle various object file formats like ELF.
- GAS
- The GNU Assembler, part of binutils, responsible for translating assembly language into machine code.
- ELF
- Executable and Linkable Format, a common standard file format for object files, executables, and shared libraries on Unix-like systems.
- INT4
- An integer data type potentially representing 4-bit values, though the commit specifies loading INT4 data into 8-bit elements, implying a conversion or specific interpretation.