SH: Reduce R0 live ranges for LRA with R0-constrained moves
SH backend reduces R0 live ranges around R0-constrained move instructions to help LRA succeed.
This commit reduces the likelihood of Long-Range Addresser (LRA) failures on the SH architecture by shortening the live ranges of the R0 register around specific move and extend instructions. It achieves this by using instruction variants that explicitly clobber R0 and by splitting moves into two instructions, tricking LRA into using non-R0 registers for operands.
In Details
Modifies SH instruction patterns in config/sh/sh.md to reduce R0 live ranges around R0-constrained moves and extends. For extend<mode>si2_short_mem_disp_z and mov<mode>_store_mem_index families, new patterns are introduced. These new patterns use explicit R0-clobbering insns or split a move into two insns, effectively allowing LRA to use non-R0 registers for operands, thereby circumventing issues identified in PR target/55212.
- LRA
- Long-Range Addresser, a register allocator in GCC designed to handle complex register allocation scenarios, particularly in architectures with large register files or specific addressing constraints.
- R0
- The general-purpose register 0 on the SuperH (SH) architecture, which has specific constraints and behaviors.
- Live range
- In compiler optimization, the scope within a program where a variable (or in this case, a register) holds a value that might be used in the future. Reducing live ranges can free up registers sooner.