i386: Correct vdpbf16ps mask usage
Fixes incorrect mask usage for 512-bit vdpbf16ps instructions on i386.
This commit corrects an issue with the 512-bit vdpbf16ps instruction on i386 architectures where it was incorrectly using a 16-bit mask, considering only the lower 8 bits due to avx512fhalfmaskmode. The fix changes the pattern to use avx512fmaskmode and removes unused iterators and patterns. 256-bit and 128-bit variants were unaffected as they correctly use 8-bit masks.
In Details
Corrects an AVX-512 FP16 VNNI instruction pattern (vdpbf16ps) where the 512-bit variant's mask was being truncated to 8 bits due to an incorrect avx512fmaskhalfmode substitution in the RTL pattern matching. The change switches to avx512fmaskmode ensuring the full 16-bit mask is respected for the 512-bit operation. Unused alternate patterns and iterators are also pruned.
- vdpbf16ps
- An AVX-512 instruction that performs a dot product of BFloat16-formatted numbers, with support for mask registers.
- AVX-512
- Advanced Vector Extensions 512, an instruction set extension for x86 processors that uses 512-bit registers for enhanced SIMD (Single Instruction, Multiple Data) operations.
- mask register
- A special register used in SIMD instructions to conditionally enable or disable operations on specific elements within a vector register.
- RTL
- Register Transfer Language, an intermediate representation used within GCC to describe programs before they are lowered to machine code.