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JULY 29, 2026
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rs6000 Performance Win

rs6000: Update mma insns to use wD constraint and update %A printer

Refines MMA instruction definitions for PowerPC, improving register constraint handling.

This patch updates the definition of Matrix Multiply-Accumulate (MMA) instructions for the PowerPC rs6000 architecture. It replaces the generic ‘d’ constraint for accumulator registers with the more specific ‘wD’ constraint and introduces a new accumulator_operand. This change ensures that when the dense-math option is enabled, these accumulators correctly map to Dense Math Registers (DMRs). Additionally, the %A operand printer is updated to display DMR register numbers when dense-math is active, improving the clarity of generated assembly.

In Details

The config/rs6000/mma.md file defines the machine-specific instruction patterns for MMA operations on PowerPC. This commit refines these definitions by switching from a potentially ambiguous d constraint (which could overlap with floating-point registers) to a wD constraint and a dedicated accumulator_operand. This ensures that these operands are correctly interpreted as Dense Math Registers (DMRs) when the dense-math feature (controlled by DMR_ENABLE) is enabled, differentiating them from standard FPRs. The print_operand function in rs6000.cc is also adjusted to reflect this…

For Context
rs6000
GCC's target identifier for IBM PowerPC and Power Architecture processors.
MMA
Matrix Multiply-Accumulate, a type of fused multiply-add operation optimized for matrix operations.
insns
Machine instructions.
wD constraint
A machine-specific constraint in GCC's instruction pattern language, likely indicating a specific type of Data register or a register suitable for double-precision floating-point operations, in this context, specifically for Dense Math registers.
accumulator operand
A specific operand type defined for MMA instructions that represents the accumulator register, ensuring correct register allocation.
dense-math option
A compiler option likely enabling the use of specialized Dense Math Registers (DMRs) on PowerPC processors for accelerated matrix operations.
DMR
Dense Math Register, a specialized register file on some PowerPC processors designed for high-performance matrix and floating-point operations.
Filed Under: rs6000powerpcmmadense-mathoptimization