ifcvt: Reject hard-register destinations in multiple sets [PR126184]
ifcvt pass now rejects conversions that involve hard registers with multiple definitions, preventing incorrect code generation.
The ifcvt optimization pass has been updated to reject rewiring operations that target hard registers when those registers have multiple definitions. This is because an exact RTL replacement cannot accurately represent values from partial or mode-changing definitions of hard registers. An RTL execution test on AArch64 demonstrates that such blocks remain unconverted, ensuring correctness.
In Details
The noce_convert_multiple_sets_1 function in ifcvt.cc now asserts that destinations are pseudos during dependency information initialization and rejects hard-register destinations in its block eligibility check. This prevents the pass from attempting invalid RTL replacements when a hard register has overlapping definitions in different modes, as tracked by PR126184. An RTL execution test on AArch64 is added to verify that such blocks are correctly identified as unsuitable for conversion.
- ifcvt
- A GCC optimization pass that converts conditional backward branches into a sequence of conditional selection instructions where possible. This can improve performance by reducing control flow divergence.
- hard register
- A physical register available on the target CPU architecture, as opposed to a pseudo-register used by the compiler internally.
- RTL
- Register Transfer Language, GCC's primary intermediate representation for machine instructions. It describes operations and data movement at a level close to the target architecture.