rs6000: Add %wD constraint and predicate for accumulators
Added new constraint and predicate for accumulator registers on future PowerPC processors.
Introduced a new constraint (%wD) and predicate for accumulator registers, preparing for future PowerPC processors that may feature dedicated registers for dense math and MMA operations. This change enables the compiler to utilize these specialized registers for enhanced performance in matrix and cryptographic computations.
In Details
This commit adds the wD constraint and accumulator_operand predicate to the rs6000 backend. These are targeted at future PowerPC processors that will introduce dedicated accumulator registers. The wD constraint is mapped to FLOAT_REGS and supports the new accumulator_operand predicate, enabling dense math and MMA patterns to utilize these new registers.
- rs6000
- GCC's backend for the PowerPC architecture, historically known as POWER/RS6000.
- constraint
- In GCC's machine description files, a constraint specifies the type of operand a machine instruction can accept, influencing instruction selection and optimization.
- predicate
- A condition that must be true for a particular machine instruction pattern to be valid, often used for conditional execution or selecting specific register classes.
- MMA
- Matrix Multiply-Accumulate. A type of operation common in linear algebra and deep learning, designed to accelerate matrix computations.