SH: Fix PR 67643
SH target fixes a bug in fpscr register handling by specifying a post-increment memory operand.
This commit addresses PR 67643 for the SH target architecture by correcting how the floating-point status and control register (fpscr) is handled. It ensures proper memory operand specification for the lds_fpscr instruction after register allocation, preventing alignment issues.
In Details
In config/sh/sh.cc, the fpscr_set_from_mem function is modified. The change involves correctly specifying lds_fpscr with a post-increment memory operand after allocating register RA, resolving an alignment problem encountered when moving the FPSCR from memory to a register in the SH architecture. This aligns with the fix required for PR 67643 and prevents potential instruction misalignments.
- SH
- A family of microarchitectures developed by Hitachi, often used in embedded systems.
- fpscr
- Floating-Point Status and Control Register. This register holds status flags (like exceptions) and control bits (like rounding mode) for floating-point operations.
- lds_fpscr
- Load Floating-Point Status and Control Register. An instruction likely specific to the SH architecture for loading the FPSCR from memory.
- post-increment memory operand
- A memory addressing mode where the address is used for the operation, and then the address register is incremented.
- PR 67643
- Problem Report 67643, a bug filed against GCC concerning incorrect behavior on the SH architecture.