Update Neoverse V2 cost model for SVE.
Improves AArch64 vectorizer performance on Neoverse V2 by correcting SVE load/store costs.
The AArch64 Neoverse V2 cost model has been updated to more accurately reflect the performance characteristics of SVE structure loads and stores. Previously, these costs were underestimated, leading the vectorizer to make suboptimal choices between AdvSIMD and SVE. This refinement aligns the cost model with the Neoverse V2 Software Optimization Guide and improves SPEC CPU 2026 performance by approximately 10.8% on Neoverse V2 systems.
In Details
The cost model in neoversev2.h for AArch64 has been updated to rectify an underestimation of SVE structure load/store instruction costs. This impacts the vectorizer's decision-making between SVE and AdvSIMD. The updated costs, based on the Neoverse V2 Software Optimization Guide, improve performance for workloads that utilize SVE for structure data transfers, as demonstrated by SPEC CPU results.
- AArch64
- The 64-bit ARM architecture, commonly used in mobile devices and servers.
- Neoverse V2
- A specific microarchitecture by Arm, designed for high-performance computing and cloud workloads.
- SVE
- Scalable Vector Extension, an optional extension for ARM processors that allows vector registers to have a variable length, adapting to the hardware.
- AdvSIMD
- Advanced Single Instruction Multiple Data, ARM's fixed-length SIMD instruction set extension.
- cost model
- A component of the compiler's optimization phase that estimates the performance cost (e.g., latency, throughput) of different instructions or sequences of instructions on a target architecture.
- vectorizer
- A compiler optimization pass that transforms loops or sequences of independent operations to use SIMD (Single Instruction, Multiple Data) instructions for parallel execution.