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JULY 29, 2026
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aarch64

aarch64: Update patterns for new simplifications

Corrects aarch64 SIMD comparison patterns after RTL simplification.

This commit updates aarch64 SIMD comparison (cmtst) patterns to accommodate a recent RTL simplification. The simplification rule (not (neg (eq x y))) to (neg (ne x y)) caused existing aarch64 patterns to fail, breaking a test case. The patterns in aarch64-simd.md have been adjusted to recognize these new canonical forms, resolving the testsuite failure.

In Details

A recent RTL simplification, (not (neg (eq x y))) <=> (neg (ne x y)), altered canonical forms. The aarch64 SIMD aarch64_cmtst* instruction patterns, which relied on the prior canonical form, failed to match, causing a testsuite regression. This patch updates the patterns in config/aarch64/aarch64-simd.md to correctly match the new simplified RTL expressions, including variants for vczle and vczbe.

For Context
RTL
Register Transfer Language. GCC's intermediate representation used for machine-dependent optimizations.
SIMD
Single Instruction, Multiple Data. A class of parallel computers in Flynn's taxonomy, where instructions are executed on multiple data points simultaneously. In processors, this refers to vector instructions.
Filed Under: aarch64simdrtl