Improve conversion detection in vector reduction chains.
Fixes detection of conversions in vector reduction chains to accurately skip them when needed.
This commit refines the detection of conversion statements within vector reduction chains. It ensures that the analysis correctly identifies and skips conversion patterns that do not match the original statement, preventing misinterpretations during optimization. A new test case is included to validate this improvement.
In Details
Within the vect-slp.cc file, the vect_analyze_slp_reduc_chain function is responsible for analyzing Superword (Vector) Level Parallelism in reduction chains. This commit updates the pattern matching logic to distinguish between a statement that *is* a conversion and a statement that *mismatches* the expected conversion, ensuring correct analysis for vectorizable reduction chains.
- vector reduction chain
- A sequence of operations where data is accumulated using a binary operation across vector elements. This allows for parallel computation of sums, products, or other cumulative results.
- conversion detection
- The process by which the compiler identifies and analyzes type conversions within the code to determine if they can be optimized or if they interfere with other optimizations like vectorization.
- SLP (Superword Level Parallelism)
- A compiler optimization technique that identifies and vectorizes sequences of identical scalar operations that operate on consecutive memory locations.