rs6000: Add TDOmode move patterns
GCC gains support for new 1024-bit Dense Math Register (TDOmode) moves on PowerPC.
GCC’s rs6000 backend now supports move operations for the new TDOmode opaque type, which represents 1024-bit Dense Math Registers intended for future Power processors. This includes implementing patterns for moves between memory, VSX registers, and Dense Math Registers, leveraging multi-register splitting and specific Dense Math instructions like dmmr, dm_insert1024, and dm_extract512.
In Details
This commit introduces support for TDOmode, a new opaque type representing 1024-bit Dense Math Registers (DMRs) on future PowerPC architectures. It adds movtdo expander and instruction patterns, handling memory-to-register, register-to-memory, and register-to-register moves. Moves involving memory or VSX registers utilize the generic multi-register splitter, while DMR-to-DMR moves use dmmr, and VSX-to-DMR moves are expanded via dm_insert1024 and dm_extract512. It also adds diagnostics for constant assignments to TDOmode and modifies splitting logic.
- rs6000
- The GCC target backend for IBM's POWER and PowerPC processor families, including POWER ISA variants.
- TDOmode
- A new opaque data mode introduced to represent 1024-bit Dense Math Registers (DMRs) on future Power processors. It allows the compiler to handle these specialized registers.
- Dense Math Registers (DMRs)
- Specialized registers on certain PowerPC architectures designed for high-performance floating-point and vector arithmetic operations, particularly within a Dense Math Facility (DMF).
- VSX
- Vector-Scalar Extension. An instruction set extension for PowerPC architectures that provides advanced vector processing capabilities, including combined vector and scalar operations.
- multi-register splitter
- A compiler mechanism that breaks down operations on large, multi-register values into sequences of operations on individual registers, allowing them to be handled by simpler instructions or register allocators.