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JULY 29, 2026
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middle-end Performance Win

Simplify bit shifts involving type truncation

Fixes incorrect 64-bit shifts after type truncation by enabling 32-bit shift simplification.

A regression in the RTL optimizer caused unnecessary 64-bit shifts in code that should have used 32-bit shifts, related to PR 123236. This patch simplifies expressions like (int)((long long)x >> 4) by correctly identifying that a 32-bit shift is sufficient after the truncation. The change in simplify-rtx.cc handles new simplifications for TRUNCATE(ZERO_EXTRACT) and TRUNCATE(SIGN_EXTRACT) equivalent to existing TRUNCATE(ZERO_EXTEND) and TRUNCATE(SIGN_EXTEND) cases.

In Details

The simplify_context::simplify_truncation function in simplify-rtx.cc now correctly handles simplifications for TRUNCATE(ZERO_EXTRACT) and TRUNCATE(SIGN_EXTRACT) when the target mode is narrower than the source operand's mode. This addresses an RTL optimization regression where some 64-bit shifts were incorrectly generated instead of their 32-bit counterparts for int return types, as seen in PR 123236.

For Context
RTL
Register Transfer Language, an intermediate representation used by GCC. It is more hardware-oriented than GIMPLE and closer to assembly code.
ZERO_EXTEND/SIGN_EXTEND
RTL operations that widen a value by filling the new high-order bits with zeros or copies of the sign bit, respectively.
ZERO_EXTRACT/SIGN_EXTRACT
RTL operations that extract a value from a wider type, similar to zero or sign extension but applied to a subfield.
TRUNCATE
An RTL operation that reduces the mode (width) of an operand, effectively discarding the high-order bits.
PR 123236
A bug report filed against GCC, tracked by the project. This specific PR concerns a code quality regression related to bit shifts and type conversions.
Filed Under: optimizationx86rtl