Fold WHILE_ULT to ptrue for AArch64 SVE.
Optimize ARM SVE loops by folding WHILE_ULT into ptrue.
This optimization for AArch64 with Scalable Vector Extension (SVE) targets the WHILE_ULT instruction, commonly used in loop pre-headers. Due to architectural guarantees on minimum and maximum vector lengths, the predicate generated by WHILE_ULT is always an all-lanes-active predicate (ptrue). This change replaces WHILE_ULT with ptrue where applicable, reducing the overhead of entering loops and improving performance.
In Details
This commit introduces aarch64_fold_while_ult_to_ptrue in config/aarch64/aarch64.cc, which is called from aarch64_instruction_selection. It leverages range information on operands within the gimple-isel pass to transform WHILE_ULT predicate generation into a constant ptrue. This is possible because ARM SVE's WHILE predication, when used with range information that implies the loop will always execute at least once for the current vector length (VL), simplifies to an unconditional predicate. This optimization avoids unnecessary predicate checks within loop pre-headers.
- AArch64
- The 64-bit ARM architecture. GCC supports generating code for this architecture.
- SVE
- Scalable Vector Extension, an instruction set extension for ARM processors that provides vector processing capabilities with a variable vector length.
- WHILE_ULT
- An ARM SVE instruction that generates a predicate based on a condition (WHILE) comparing an element count against a limit (ULT - Until Less Than). It's often used to set loop predicates.
- ptrue
- An ARM SVE instruction that generates an 'all lanes active' predicate. It's a simpler and often more efficient form than conditionally generated predicates.
- Predicate
- In SIMD/vector processing, a mechanism often used to control which lanes of a vector operation are active. A predicate can be a bitmask or a set of boolean flags.
- gimple-isel
- GCC's instruction selection pass for the Gimple intermediate representation. This pass maps Gimple operations to target-specific machine instructions.