WEDNESDAY, JULY 15, 2026
risc-v
RISC-V: Fix GE/GEU zicond splitter to emit correct comparison
Corrects a RISC-V code generation bug where GE/GEU comparisons were miscompiled.
A code generation splitter for RISC-V’s zicond extension incorrectly used a greater-than comparison instead of a greater-than-or-equal-to comparison for GE/GEU operations. This led to miscompilation when the input value was exactly 1. The fix ensures the splitter emits the correct comparison, matching the intended behavior.
In Details
The zicond.md machine description for RISC-V had a conditional splitter for GE/GEU that substituted any_gt for any_ge. This caused a miscompile when x == 1, as x > 1 evaluates to false, while x >= 1 evaluates to true. This commit corrects the pattern to use any_ge.
For Context
- zicond
- A RISC-V CPU extension that adds conditional comparison instructions, including greater-than-or-equal-to (GE) and greater-than-or-equal-to unsigned (GEU).
- splitter
- In GCC's machine description files (
.md), a code pattern that matches a specific high-level operation and generates lower-level instructions. Splitters are used to break down complex operations into simpler ones. - any_gt
- An internal GCC instruction pattern representing a greater-than comparison.
- any_ge
- An internal GCC instruction pattern representing a greater-than-or-equal-to comparison.