AArch64: Enable SVE AES instructions in streaming mode
AArch64 SVE AES instructions are now usable in streaming mode with FEAT_SSVE_AES.
This commit enables the AArch64 SVE AES instructions (AESE, AESD, AESMC, AESIMC) to function in Streaming SVE mode, by leveraging the FEAT_SSVE_AES feature. The changes involve updating CPP builtins, DEF files, and model files to correctly identify and utilize these AES instructions in their streaming-compatible form. Tests are also updated to reflect this new capability.
In Details
This change enables FEAT_SSVE_AES, allowing existing Streaming SVE (SSVE) instructions to be used for AES operations. The update modifies SVE2-AES built-in definitions and related SVE2 modes in the AArch64 backend. Specifically, the TARGET_SVE2_AES macro is renamed to TARGET_SVE_AES to reflect its broader applicability in SSVE mode, and test cases are adjusted accordingly.
- SVE
- Scalable Vector Extension. An ARM architecture feature that allows vector registers to have a flexible length, adapting to the underlying hardware. This enables code to run efficiently across a range of devices without recompilation.
- Streaming SVE (SSVE)
- A mode of operation for ARM's Scalable Vector Extension where vector operations can be pipelined more effectively, improving performance for certain workloads, particularly those involving continuous data streams.
- FEAT_SSVE_AES
- A specific ARM architecture feature or extension that enables AES (Advanced Encryption Standard) instructions to be used within the Streaming SVE mode.
- AArch64
- The 64-bit execution state of the ARMv8-A architecture and subsequent versions. It is the primary architecture for modern high-performance ARM processors.
- intrinsics
- Special functions or assembly language mnemonics that expose hardware capabilities directly to the C/C++ programming language. They allow for fine-grained control over hardware features like vector operations.