AArch64 improves SIMD highpart builtin folding.
AArch64's SIMD folding now correctly handles uniform 64b vectors for 128b highpart operations.
The AArch64 backend improves folding of SIMD lowpart builtins into highpart builtins. It now correctly handles cases where a 64-bit wide uniform vector is extended to 128 bits for highpart operations. The change widens uniform vectors before adding them to the call arguments for the equivalent highpart builtin, ensuring correct behavior for these operations.
In Details
The aarch64_fold_lo_call_to_hi function in the AArch64 backend is enhanced to properly fold calls involving uniform vectors. Specifically, it now checks if a 64-bit uniform vector can be widened to 128 bits for highpart operations. If so, it widens the vector before adding it to the call_args for the corresponding highpart builtin call, resolving an issue with insufficient vector width.
- AArch64
- The 64-bit ARM architecture, a common instruction set architecture for mobile and server processors.
- SIMD
- Single Instruction, Multiple Data. A class of parallel computers that perform the same operation on multiple data points simultaneously.
- builtin
- A function or operation that is recognized and handled directly by the compiler, often providing access to specific hardware capabilities.
- folding
- An optimization technique where expressions or function calls are evaluated at compile time if their inputs are known constants.