AArch64: Implement FRINT32/64 SVE instructions
GCC now supports FRINT32X/Z and FRINT64X/Z instructions in SVE2.2 and SME2.2, which round floating-point numbers to 32-bit or 64-bit integers.
GCC now supports FRINT32X/Z and FRINT64X/Z instructions in SVE2.2 and SME2.2, which round floating-point numbers to 32-bit or 64-bit integers. The new intrinsics and RTL patterns have been implemented, along with a standard set of ASM tests.
In Details
SVE2.2 and SME2.2 add FRINT32X/Z and FRINT64X/Z vector instructions, which perform floating-point rounding to 32-bit or 64-bit integers. This commit implements the intrinsics in aarch64-sve-builtins-sve2.cc and the corresponding RTL patterns in aarch64-sve2.md. The implementation is straightforward and includes a standard set of ASM tests.
For Context
The Scalable Vector Extension (SVE) is an Arm architecture extension that allows vector instructions to operate on vectors of varying lengths. This allows code to be written once and then run on different hardware with different vector lengths. Streaming SVE (SME) is an extension to SVE that allows vector operations to operate on streams of data. FRINT32/64 instructions convert floating point numbers to integers. This commit adds support for these new instructions in SVE2.2 and SME2.2.