RISC-V: Improve Code Generation for Select Between 2^n and 0
GCC now generates more efficient RISC-V code for selecting between a power of 2 and zero, potentially saving bytes and improving performance.
GCC now generates more efficient RISC-V code for conditional expressions that select between a power of 2 (2^n) and 0. This optimization replaces a sequence of instructions with a shift-and-subtract, reducing code size and potentially improving performance by increasing the number of operations per fetch block. The change lays the groundwork for further generalizations to handle selecting between other constants.
In Details
The RISC-V backend now splits conditional selects between 2^n and 0 into a shift-left-and-subtract sequence. This pattern is triggered in code like (y < x) ? 1 : -1, which translates to a select between 1 and -1 (achieved by shifting the SLT result and subtracting 1). The new splitter prepares the existing code to handle the 2^n-1 and -1 cases automatically and will be simple to extend with basic framework in place.
For Context
When compiling code, the compiler often needs to translate high-level conditional expressions (like if statements or the ternary operator ? :) into machine code that selects between different values based on a condition. This commit improves how GCC generates RISC-V code for cases where the selection is between a power of 2 and zero, resulting in smaller and faster code.