AVR: Overhaul CLZ, CTZ and FFS instructions with hard-reg constraints.
Improves CLZ, CTZ, and FFS instruction handling for AVR by using hard-reg constraints and code iterators.
This patch overhauls the CLZ, CTZ, and FFS instructions for the AVR architecture. It replaces explicit hard registers with hard-reg constraints to model the register footprint of their libgcc asm implementations. Additionally, the patch introduces code iterators to factor out commonalities, simplifying the code and making it more maintainable. These changes improve the code generation process for these instructions without relying on instruction combining.
In Details
This commit refactors the AVR backend's handling of CLZ, CTZ, and FFS instructions. These instructions previously used explicit hard registers, but this patch changes them to use hard-reg constraints instead. Code iterators (ctz_ffs, cxz_ffs) are introduced to reduce code duplication and improve maintainability. The new instructions and splits (clzhi2, ctzhi2, etc.) are derived from former expanders. The instructions aren't combined, making https://gcc.gnu.org/r17-438 not a blocker.
For Context
In the context of compilers, instructions like CLZ (count leading zeros), CTZ (count trailing zeros), and FFS (find first set) help optimize certain operations. For the AVR microcontrollers (commonly used in embedded systems), this commit refactors how these instructions are handled internally within the GCC compiler. By using 'hard-reg constraints', the compiler can more effectively manage how these instructions use registers, potentially leading to slightly better performance or code size. 'Code iterators' are used to organize the code within the compiler, making it easier to understand and maintain.