RISC-V: Optimize power-of-2 boundary comparisons in conditional moves.
Optimizes conditional moves by converting power-of-2 boundary comparisons into shift-based equality tests.
The RISC-V backend optimizes conditional moves by detecting unsigned comparisons against power-of-2 boundaries and converting them to shift-based equality tests. This avoids materializing large constants, replacing them with a single shift instruction. This optimization improves code generation for expressions like (a & (0xff << 56)) ? b : 0.
In Details
In riscv_expand_conditional_move, this patch detects unsigned comparisons against power-of-2 boundaries and converts them to shift-based equality tests, emitting srli+czero instead of bseti+sltu. Existing define_split patterns in riscv.md handle the same optimization for standalone SCC operations but they don't fire in the conditional move expansion path which goes through riscv_expand_int_scc directly. This requires familiarity with the RISC-V instruction set and code expansion within the GCC backend.
For Context
Conditional moves are a way to select one of two values based on a condition. This commit optimizes how the RISC-V compiler generates code for conditional moves when the condition involves comparing a value to a power of two. The optimization replaces a potentially expensive sequence of instructions with a more efficient shift-and-compare sequence, leading to faster code execution.