RISC-V: Use table-driven dispatch in riscv-fusion.cc.
The RISC-V macro fusion logic now uses a table-driven approach to simplify and extend instruction fusion.
The RISC-V macro fusion logic in riscv-fusion.cc was refactored to use a table-driven dispatch. Each fusion case is now a static checker function, and a struct array drives the dispatch loop. This change simplifies the code and makes it easier to add new fusion rules, such as those for branch instructions. Boolean helper functions were renamed to use the _p suffix per GNU/GCC convention.
In Details
The commit refactors riscv_macro_fusion_pair_p to replace a large series of if-blocks with a table-driven approach, where each fusion case is extracted into its own static checker function. This simplifies the checker interface and makes it more flexible for future extensions. The interaction with other subsystems is minimal, focusing on instruction-level optimizations within the RISC-V backend.
For Context
Instruction fusion combines multiple instructions into a single, more efficient instruction. This optimization pass reduces overhead and improves performance. In GCC, instruction fusion is handled by the macro fusion logic, which identifies pairs of instructions that can be combined. This commit refactors the RISC-V instruction fusion logic to use a table-driven approach, making it easier to maintain and extend.