AVR: Use hard-reg constraints for __load_<size> insns.
The AVR backend now uses hard-register constraints for `__load_<size>` instructions, simplifying code generation for flash memory accesses.
The AVR backend is updated to use hard-register constraints instead of explicit hard registers for instructions that generate transparent __load_<size> calls. This change simplifies the code generation for flash memory loads of 3-byte and 4-byte integral, floating-point, and fixed-point values on devices without the LPMx instruction. This change clarifies code generation, but may also impact generated code size and performance, depending on the specific code being compiled.
In Details
The avr.md file defines the instruction patterns for the AVR backend. The __load_<size> instructions are used to load data from flash memory. By using hard-reg constraints, the compiler now has more flexibility in register allocation for these instructions. The expander for gen_load<mode>_libgcc is removed, and special handling for sources that satisfy avr_load_libgcc_p in mov<mode> is no longer needed.
For Context
The AVR architecture often uses flash memory for storing constant data. The compiler generates special __load_<size> instructions to read data from flash. This commit changes how these instructions are handled, making the code generation process simpler and more flexible. Hard-register constraints allow the compiler to choose the specific register to use for the load operation, which can improve code generation efficiency.