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JUNE 15, 2026
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i386 Performance Win

I386: Rewrite index*1+disp into base+disp

GCC now optimizes i386 address calculations by rewriting index*1+displacement into base+displacement, reducing code size and improving efficiency.

This commit optimizes address calculations on i386 architectures. It rewrites expressions of the form [index * 1 + displacement] into [base + displacement]. This eliminates the need for a SIB (Scale, Index, Base) byte in the instruction encoding, as RSP cannot be used as index. This rewrite also allows small displacements to be encoded in a single byte, further reducing code size.

In Details

This commit modifies ix86_decompose_address in config/i386/i386.cc to handle the case where an address consists of an index register scaled by 1 plus a displacement, with no base register. This transformation avoids generating a SIB byte when the index register isn't RSP, and enables shorter displacement encodings. Awareness of x86 addressing modes and instruction encodings is needed to appreciate the effect.

For Context

This commit improves GCC's code generation for Intel 386 (i386) processors. When accessing memory, processors use addressing modes to calculate the memory location. This involves combining a base address, an index (which can be scaled), and a displacement (offset). This optimization simplifies address calculations when the index is multiplied by 1 and there's a displacement, rewriting it to use a base register and displacement directly. This results in smaller and faster machine code because it avoids using a more complex addressing mode that requires an extra byte in the instruction.

Filed Under: i386code generationoptimization