AArch64 gains support for vectorizing long-to-float conversions.
The compiler can now vectorize conversions from long to float on AArch64, improving performance when converting arrays of integers to floating-point values.
This commit adds a new pattern, vec_packs_float_v2di, to the AArch64 backend, enabling the vectorizer to convert arrays of long integers to floating-point numbers using SIMD instructions. This can significantly improve the performance of code that performs many such conversions, as it allows the compiler to process multiple elements in parallel. A new test case gcc.target/aarch64/pr123748.c validates the new pattern.
In Details
GCC's vectorizer transforms scalar operations into vector operations to improve performance. This patch adds a new pattern to aarch64-simd.md to enable vectorization of long-to-float conversions. The new vec_packs_float_v2di pattern leverages SIMD instructions for parallel processing. This change is specific to the AArch64 architecture and requires an understanding of GCC's vectorization process and instruction selection.
For Context
Modern CPUs can perform the same operation on multiple data points simultaneously using SIMD (Single Instruction, Multiple Data) instructions. A compiler's vectorizer automatically transforms scalar code (operating on single values) into vector code (operating on multiple values in parallel) to exploit these capabilities. This commit extends the compiler's ability to vectorize code on AArch64 processors, specifically when converting integers into floating-point numbers. By using vector instructions, the compiler can perform these conversions much faster, leading to performance improvements in applications that heavily rely on floating-point arithmetic.