Fix expected testsuite output after ext-dce changes
The RISC-V testsuite is updated to accommodate changes in dead code elimination that may transform sign extensions into zero extensions.
Recent improvements to GCC’s extended dead code elimination (ext-dce) pass can now transform sign extensions into zero extensions in some cases. This affects RISC-V testsuite results because tests were expecting signed loads but are now seeing unsigned loads. The testsuite is updated to allow for either signed or unsigned loads in the affected tests.
In Details
The ext-dce changes transform sign extension to zero extension. RISC-V tests expecting a signed load (lw) may now see an unsigned load (lwu). The fix updates the tests to look for (lwu|lw) in the expected output files. This issue doesn't manifest on rv32 because lw loads a full word.
For Context
Compilers apply various optimization techniques to improve the performance of generated code. Dead code elimination (DCE) removes code that doesn't affect the program's outcome. Sign extension and zero extension are ways of increasing the bit width of a number while preserving its value. This commit addresses a change in how GCC optimizes code for the RISC-V architecture and adjusts the testsuite to reflect this change.