RS6000 Gains Builtins for AES Acceleration Instructions
GCC now provides built-in functions for AES acceleration instructions on RS6000, enabled with the `-mcpu=future` option.
GCC now includes builtins for AES acceleration instructions on RS6000 architectures, which are meant for possible future processors. These builtins, enabled with -mcpu=future, expose AES encryption, decryption, key generation, and Galois field multiplication. The new builtins provide a way to use AES acceleration when it becomes available.
In Details
This commit introduces new builtins for AES acceleration on the rs6000 architecture, adding entries such as UNSPEC_XXAESENCP to config/rs6000/crypto.md. These intrinsics leverage vector instructions to accelerate cryptographic operations, contingent on future hardware support. Expect possible ABI churn on these.
For Context
The Advanced Encryption Standard (AES) is a widely used symmetric-key encryption algorithm. This commit introduces built-in functions that leverage specialized hardware instructions for AES on RS6000 processors. These builtins (e.g., __builtin_aes_encrypt_paired) provide an interface for developers to use AES acceleration if the target CPU supports it. They're enabled via the -mcpu=future flag, signaling that the underlying hardware may not yet be available.