RISC-V: Correct conditional move expansion after operand canonicalization.
The RISC-V port now correctly handles changes to operand modes during conditional move expansion, fixing a bug introduced by recent improvements.
The RISC-V backend now correctly accounts for changes in operand modes that can occur during the canonicalization step of conditional move expansion. The canonicalization process can alter the mode of operands, and the previous code used a stale mode (QI), leading to errors. The fix involves reordering the mode extraction to occur after canonicalization. This resolves PR target/125152.
In Details
The RISC-V port's riscv_expand_conditional_move function canonicalizes comparison operands, which can change their modes. The original code didn't account for this, leading to the use of stale modes and subsequent errors. This commit reorders mode extraction to occur after canonicalization, resolving the issue. The interaction with the instruction expansion pass is key here.
For Context
Conditional move instructions conditionally transfer a value based on a boolean condition. Compilers often transform code to use these instructions for performance. As part of this transformation, operands may be converted to a standard or "canonical" form. This commit fixes a bug in the RISC-V backend where the compiler was using an outdated representation of data types after this conversion, leading to incorrect code generation.