ARM Thumb-1 CBZ conditional branch tracking is fixed
GCC's ARM backend for Thumb-1 now correctly tracks condition codes for CBZ instructions, preventing redundant CMP instructions.
This commit fixes a bug in the GCC ARM backend affecting Thumb-1 CBZ (Compare and Branch if Zero) instructions. Previously, the compiler’s condition code tracking mechanism incorrectly used the jump target label instead of the actual zero operand when checking for reusable condition codes. This led to the generation of redundant CMP instructions before a CBZ. The fix ensures that CBZ is properly recognized as a conditional branch, allowing the compiler to correctly track condition code state and avoid unnecessary instructions, resulting in smaller and more efficient Thumb-1 code.
In Details
This bug fix in config/arm/thumb1.md and config/arm/arm.cc addresses an issue with condition code (CC) tracking for the Thumb-1 CBZ (Compare and Branch on Zero) instruction. In Thumb-1, CBZ implicitly compares a register against zero and branches. The thumb1_cbz pattern in the GCC instruction selection erroneously used operands[2] (which represents the jump target label) as the second operand for CC tracking, instead of const0_rtx (the implicit zero). This prevented the instruction scheduler from correctly recognizing when the CCs were already set by a preceding instruction, lea…
For Context
When a computer program runs on an ARM processor using the "Thumb-1" instruction set (a compact set of instructions for smaller, embedded systems), the compiler needs to generate efficient code. One common operation is to check if a value is zero and then jump to another part of the code if it is. The CBZ instruction does this. This commit fixes a bug in how the GCC compiler handled these CBZ instructions. Previously, the compiler sometimes thought it needed to perform an extra "compare" (CMP) instruction right before a CBZ, even though CBZ already includes that comparison. This happened because the compiler was looking at the wrong piece of information when deciding if the comparison was already done. By fixing this, the compiler now generates slightly smaller and faster programs for Thumb-1 ARM processors, as it avoids generating redundant instructions.