AArch64 removes <vconq> from pattern name
This commit updates the instruction pattern name for AArch64 SVE vector duplication by removing a redundant suffix, reflecting a prior simplification.
A recent change to the AArch64 SVE vector duplication pattern eliminated the need for the <vconq> suffix in its name. This patch removes that suffix from the *aarch64_vec_duplicate_subvector<vconsv><vconq><mode> instruction pattern definition in aarch64-sve.md, making the name consistent with the actual functionality after the associated simplification.
In Details
This change in aarch64-sve.md updates the name of the *aarch64_vec_duplicate_subvector<vconsv><vconq><mode> instruction pattern. After a previous patch simplified the internal workings of the vector duplication, the <vconq> component of the name became redundant. This commit merely brings the pattern's descriptive name in line with its current, streamlined implementation, improving clarity within the AArch64 backend's instruction definitions for SVE.
For Context
When adding new features or optimizing existing ones in a compiler like GCC, the internal descriptions of how those features work (called "instruction patterns") need to be clear and accurate. On AArch64 processors, there's a specialized instruction set called SVE for handling large vectors of data. A recent change simplified how the compiler duplicates parts of these vectors. This commit simply updates the name of the internal pattern used for this operation, removing a part of the name that is no longer relevant after the simplification. This helps keep the compiler's internal code clean and understandable.