libgomp, amdgcn: Ensure s_memrealtime uses SGPRs
AMD GCN time function now correctly uses special function registers (SGPRs) for stability.
The s_memrealtime intrinsic within libgomp’s AMD GCN backend was using a generic ‘r’ register constraint. This could lead to instability, especially in SIMT execution, as it might only select a compatible register by chance. This commit changes the constraint to the more specific Sg (Special General Purpose Register), ensuring that the intrinsic reliably uses SGPRs, thereby improving the stability and correctness of time-related functions on AMD GPUs.
In Details
In libgomp/config/gcn/time.c, the omp_get_wtime function uses an inline assembly snippet that calls the s_memrealtime intrinsic. Previously, this intrinsic used an 'r' constraint for register selection, which was insufficient for the AMD GCN architecture's SIMT execution model. The 'r' constraint might pick any general-purpose register, but s_memrealtime requires specific register types for predictable behavior. This change enforces the use of SGPRs by specifying =Sg as the output constraint, guaranteeing that the intrinsic operates correctly and reliably on GCN hardware.
- libgomp
- The GNU implementation of OpenMP, providing runtime support for parallel programming constructs.
- amdgcn
- AMD's Graphics Core Next architecture, a GPU instruction set architecture used in many AMD Radeon graphics cards.
- s_memrealtime
- A specific assembly instruction or intrinsic on AMD GCN architecture likely related to measuring real-time performance or elapsed time.
- SGPR
- Special General Purpose Register. A type of register on AMD GCN GPUs used for scalar values and control information, distinct from vector registers (VGPRs).
- SIMT
- Single Instruction, Multiple Threads. A parallel execution model used in GPUs where multiple threads execute the same instruction simultaneously on different data.
- constraint
- In inline assembly, a character code specifying the type of operand (e.g., register, memory) that a particular part of the assembly instruction can use.