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OCTOBER 6, 2026
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gcc/i386

Add tmm as fake register

Introduces a 'fake' TMM register to facilitate future register allocation for ACE ISAs.

This commit introduces a conceptual ‘TMM’ register within GCC’s i386 backend to prepare for future register allocation in ACE ISAs. While full register allocation is not yet implemented due to spill management complexities, this ‘fake’ register allows the compiler to understand instruction dependencies better than using inline assembly. It ensures that users can pass TMM register numbers, enabling user-driven allocation which is suitable as TMM acts as an accumulation unit.

In Details

Introduces a placeholder ('fake') TMM register in the i386 backend to prepare for future register allocation in ACE. Instead of using inline assembly wrappers for ACE intrinsics, internal patterns are used, requiring users to explicitly provide TMM register numbers. This enables the compiler to track dependencies between instructions involving TMM registers, even though full register spill management is not yet implemented. Updates regclass_map, debugger maps, ix86_conditional_register_usage, and register ordering definitions in i386.cc and i386.h.

For Context
ACE
AI Compute Extensions, a new x86 instruction set architecture designed for AI and compute-intensive workloads.
TMM
Tile Matrix Multiply registers, used in AMX (Advanced Matrix Extensions) for matrix operations.
register allocation
The process by which a compiler assigns program variables and temporary values to the limited number of hardware registers available on a CPU.
inline assembly
A language construct that allows embedding assembly language code directly within C/C++ source code.
Filed Under: gcci386ACEregister allocationcompiler internals