Support ACEv1 instructions reused from AMX-TILE
Integrates ACEv1 instructions from AMX-TILE, using distinct intrinsic names and handling `tilerelease` via inline assembly.
This commit adds ACEv1 support for instructions originating from AMX-TILE, differentiating them from legacy AMX with _ace_ suffixes in intrinsic names while sharing builtins. It also addresses tilerelease by using inline assembly for simplicity, as register allocation is not yet handled for this operation. The changes include modifications to GCC’s configuration, built-in definitions, expansion logic, and machine instruction patterns, alongside new test cases.
In Details
Enables ACEv1 to reuse instructions from AMX-TILE, differentiating them via intrinsics like _ace_ appended to legacy AMX names (e.g., _mm512_tileloadd_ace_ for _mm512_tileloadd_). Builtins are shared. tilerelease is handled via inline assembly because explicit register numbers are not needed and pattern-based expansion is less beneficial due to dependency tracking. Updates include config.gcc, i386-builtin-types.def, i386-builtin.def, immintrin.h, and sse.md for UNSPECV_TILEZERO. New test files are added.
- ACEv1
- AI Compute Extensions version 1, a new x86 instruction set architecture designed for AI and compute-intensive workloads.
- AMX-TILE
- Advanced Matrix Extensions (AMX) with tile-based operations, designed for efficient matrix computations.
- intrinsics
- Special functions that allow C/C++ code to directly invoke specific machine instructions, often providing performance benefits over traditional function calls.
- inline assembly
- A language construct that allows embedding assembly language code directly within C/C++ source code.