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OCTOBER 6, 2026
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match-sat-alu.pd Performance Win

Recognize complement tests for unsigned saturating addition.

GCC can now recognize complement tests for unsigned saturating addition, optimizing it to a single instruction on AArch64.

The match-sat-alu.pd pattern matching has been extended to recognize comparisons involving the complement of an operand for unsigned saturating addition. This allows the compiler to replace code like X > ~Y ? MAX : X + Y with a single uqadd instruction on AArch64, reducing four vector operations to one.

In Details

The match-sat-alu.pd file defines patterns for recognizing and optimizing saturating arithmetic. This change adds recognition for expressions that use comparisons with complements of operands to detect overflow in unsigned saturating addition (unsigned_integer_sat_add). For instance, MAX - Y is equivalent to ~Y. The optimization transforms constructs like X > ~Y ? MAX : X + Y into a single saturating add instruction, benefiting architectures like AArch64.

For Context
match-sat-alu.pd
A pattern description file used by GCC's backend to recognize and optimize specific arithmetic operations, particularly saturating arithmetic.
saturating addition
An arithmetic operation that, if the result exceeds the maximum representable value for the operand type, clamps the result to the maximum value instead of wrapping around or causing an overflow error.
complement
In binary representation, the bitwise complement of a number is obtained by inverting all of its bits (0 becomes 1, and 1 becomes 0). For unsigned integers, the complement of Y is equivalent to MAX_VALUE - Y.
AArch64
The 64-bit ARM architecture, widely used in mobile devices and increasingly in servers and desktops. GCC has a backend to generate code for this architecture.
uqadd
An AArch64 SIMD instruction that performs an unsigned saturating addition.
Filed Under: optimizationaarch64vectorization