RISC-V: Optimize vector loop costs with dynamic LMUL
Improves RISC-V vector code generation by comparing costs for dynamic LMUL.
This commit enhances the RISC-V vector code generation by more accurately comparing the costs of different vector length multiplier (LMUL) modes when -mrvv-max-lmul=dynamic is used. It avoids premature rejection of vectorization and considers scenarios where different loop structures might incur varying spill costs, leading to better optimization choices for unknown iteration count loops.
In Details
The riscv-vector-costs.cc file's costs::better_main_loop_than_p function is updated to accurately compare vector loop costs under the -mrvv-max-lmul=dynamic option. Previously, it might have rejected vectorization too early or favored suboptimal LMUL values. This patch ensures that when the loop iteration count is unknown, the cost model now evaluates different VLA (Vector Length Agnostic) modes, including their spill costs, to select the most efficient LMUL, aligning with the behavior for unknown-iteration count memory operations.
- LMUL
- The Vector Length Multiplier in RISC-V vector operations. It specifies how many vector registers are conceptually grouped to form a larger vector register, affecting performance and instruction encoding.
- dynamic LMUL
- A mode where the linker or compiler chooses the most appropriate LMUL at link time or runtime, based on available hardware and code characteristics, rather than a fixed value.
- VLA
- Vector Length Agnostic. A programming model for vector operations where the code is written to work correctly regardless of the underlying vector register size or the LMUL setting.
- spill costs
- The overhead associated with temporarily storing a value from a register to memory when all registers are in use, and then reloading it later.