Implement `umul<mode>3_highpart` for V2DI/V4DI using SSE2
Adds optimized hardware implementation for high-part multiplication of double-word vectors, improving performance on Zen4.
This commit implements the umul<mode>3_highpart intrinsic for V2DI, V4DI, and V8DI vector types using SSE2 instructions, specifically pmuludq. This provides a hardware-accelerated path for calculating the high-order part of unsigned integer multiplications on vectors of double-words. The implementation targets specific vector types and instruction sets (VI8_AVX2_AVX512F) and includes cost modeling for the new operation. This change is expected to significantly speed up workloads like 750.sealcrypto_r by approximately 20% on Zen4 processors, recovering performance lost in a previous revision.
In Details
This commit introduces a target-specific implementation for umul<mode>3_highpart in config/i386/i386-expand.cc for vector modes V2DI, V4DI, and V8DI. It leverages the pmuludq SSE2 instruction, which computes the high-order 64 bits of the product of two 64-bit integers. The function ix86_expand_umulvndi_highpart is added to handle this expansion. Costing for this operation is integrated into ix86_vector_costs::add_stmt_cost and also for the MULT_HIGHPART_EXPR case, using SImode multiplication costs as a proxy for the widening SIMD multiplication. The new implementation is enabled f…
- umul<mode>3_highpart
- An intrinsic function that computes the high-order part of the result of an unsigned integer multiplication between two operands of a specified mode (vector type).
- V2DI
- A vector data type consisting of two 64-bit double-word integers (2x64-bit).
- V4DI
- A vector data type consisting of four 64-bit double-word integers (4x64-bit).
- V8DI
- A vector data type consisting of eight 64-bit double-word integers (8x64-bit).
- SSE2
- Streaming SIMD Extensions 2. An x86 instruction set extension that introduced new instructions for integer and floating-point operations, including enhanced support for SIMD (Single Instruction, Multiple Data) processing.
- pmuludq
- An SSE2 instruction that performs a packed unsigned double-quadword multiplication, computing the high-order 64 bits of the product of two packed 64-bit integers.
- Zen4
- The fourth generation of AMD's Zen microarchitecture, known for its performance improvements in both single-threaded and multi-threaded workloads.