RISC-V: Rewrite vector FMA patterns using fma rtxes
RISC-V vector FMA patterns are rewritten to use dedicated fma RTXs, improving code generation and fixing a performance regression.
The RISC-V vector Floating-Point Fused Multiply-Add (FMA) patterns have been rewritten to use specific fma RTX (Register Transfer language eXpression) forms instead of matching generic multiply-add trees. This change enables the compiler to correctly fuse operations into FMA instructions, even when floating-point contraction is disabled (-ffp-contract=off). The rewrite also addresses several pattern variations and fixes a performance regression in vf-3-f32.c by ensuring proper handling of scalar reuse and widening broadcasts.
In Details
Vector FMA patterns in RISC-V's autovec.md and autovec-opt.md were previously matching (plus (mult ...)) trees, allowing fusion even with -ffp-contract=off. This commit rewrites them to use fma, fnma, fms, fnms RTXs. This is necessary because fma folds negations and subtractions into its operands, creating different RTL shapes than the generic add/multiply form. New patterns cover various operand combinations and negations, including extend_f variants to fix a regression in vf-3-f32.c where Combine failed to match inlined broadcasts, falling back to inefficient `vfnmsac.…
- RISC-V
- A free and open instruction set architecture (ISA) based on Reduced Instruction Set Computer principles. It is modular and extensible, popular for embedded systems and custom hardware accelerators.
- FMA
- Fused Multiply-Add. A single instruction that computes
(a * b) + c, often with higher precision and performance than separate multiply and add operations. - RTX
- Register Transfer language eXpression. GCC's internal representation for machine instructions and operations, used by backend passes for pattern matching and code generation.
- autovec.md
- A GCC machine description file containing patterns for automatic vectorization, enabling the compiler to generate SIMD instructions from scalar code.
- FP-contract
- Floating-point contraction. A compiler option (
-ffp-contract=on/off/fast) that controls whether floating-point multiply-add operations can be fused into a single FMA instruction, potentially affecting precision and performance.