AArch64: Use specific operand for atomic_store
Improves common subexpression elimination for atomic stores by using a more specific operand.
The generic atomic_store<mode> pattern in the AArch64 backend used general_operand, which prevented common subexpression elimination (CSE) when the store value was an immediate. This commit replaces general_operand with aarch64_reg_or_zero, a more specific operand that allows CSE to function correctly, potentially leading to more optimized code.
In Details
The atomic_store<mode> pattern in config/aarch64/atomics.md previously used general_operand, which is too broad and prevents common subexpression elimination (CSE) if the value being stored is an immediate. By switching to aarch64_reg_or_zero, which is more restrictive and suitable for register or zero values, CSE is enabled when the store value is an immediate, improving code generation efficiency.
- AArch64
- The 64-bit ARM architecture. GCC supports code generation for this platform.
- atomic_store
- An intrinsic function or machine instruction that performs a store operation to memory atomically, meaning it completes indivisibly without interruption from other threads or processes.
- general_operand
- A broad constraint in GCC's machine description files that matches any valid operand, often used as a fallback but can hinder specific optimizations like CSE.
- common subexpression elimination (CSE)
- An optimization that identifies and eliminates redundant computations within a program. If an expression is calculated multiple times, CSE ensures it's computed only once, and the result is reused.
- immediate
- A constant value embedded directly within an instruction, rather than being fetched from memory or a register.
- aarch64_reg_or_zero
- A specific operand predicate for the AArch64 backend that matches either a general-purpose register or the immediate value zero.