RISC-V: Fix ICE for widening instructions with disparate register counts
Compiler no longer crashes when RISC-V widening instructions involve source and destination registers with different counts.
The compiler previously asserted that destination register counts must exceed source register counts for widening instructions in RISC-V. This commit modifies the riscv_v_widen_constraint_ok function to return false instead of asserting when the destination has fewer registers than the source. This resolves an internal compiler error (ICE) that occurred in specific scenarios, such as when widening a vector register group.
In Details
In RISC-V vector processing, widening instructions like vwmacc.vx can involve register operands where the destination register group may have a different number of physical registers than the source. The riscv_v_widen_constraint_ok function, intended to validate register constraints, incorrectly asserted that the destination register count (nregs) must be greater than the source. This change relaxes that assertion to avoid an ICE during the reload pass, allowing cases where dest.nregs < src.nregs if register overlap is permissible.
- ICE
- Internal Compiler Error. A severe error within the compiler itself, typically caused by an unexpected internal state or logic flaw, leading to a crash.
- RISC-V vector extension (RVV)
- An extension to the RISC-V instruction set architecture that provides support for vector (SIMD) operations, enabling single instructions to operate on multiple data elements simultaneously for improved performance in data-parallel tasks.
- widening instruction
- A vector instruction that expands the data elements of a source register into a wider destination register, often used in operations like multiply-accumulate where the intermediate or final result requires more precision or range.
- register group
- A contiguous set of vector registers, typically defined by the RISC-V vector extension's configuration, which can be treated as a single unit for certain operations or constraints.
- reload pass
- A compiler optimization pass that, after register allocation, determines the precise machine registers to be used for each value and inserts load/store instructions as needed.