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OCTOBER 6, 2026
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match.pd Performance Win

Combine two single-bit tests into one masked compare

Optimizes combinations of two single-bit tests on the same operand into a single masked comparison.

This optimization simplifies pairs of single-bit tests on the same operand into a single masked comparison, reducing instruction count. For example, it transforms conditions like (X & C1) != 0 & (X & C2) != 0 into (X & M) == M, where M is the combined mask. This is particularly effective on architectures like ARM, reducing sequences from 4-8 instructions to a single compare-and-branch instruction.

In Details

The match.pd rules now combine pairs of single-bit tests on the same operand into a single masked comparison. This optimization applies to cases where the original tests are of the form (X & C1) cmp 0 and (X & C2) cmp 0, and transforms them into a single comparison involving the union mask M = C1 | C2. The transformation is guarded by integer_pow2p to ensure it only applies to power-of-two masks and requires single-use comparisons to avoid statement duplication. This reduces instruction counts significantly on architectures like ARM.

For Context
match.pd
Likely refers to a pattern-matching or optimization description file related to the 'pattern-driven' or 'product development' optimization pass within GCC, focused on matching and transforming specific code patterns.
Masked Compare
A comparison operation that uses a bitmask to select which bits of an operand are considered during the comparison.
ARM
A family of reduced instruction set computing (RISC) architectures widely used in mobile devices and embedded systems, also increasingly in servers and laptops.
Filed Under: optimizationarminstruction reduction