Vectorize floor/ceil/trunc also with trapping-math
Enabled vectorization of floor, ceil, and trunc operations even when trapping-math is enabled.
Previously, vectorized floor, ceil, and trunc instructions on x86 were disabled when the flag_trapping_math option was active. This commit removes that restriction, allowing the use of packed vector instructions (e.g., vroundps) which are compliant with ISO 60559 standards regarding exceptions for NaN inputs. The scalar ‘round’ function still requires flag_trapping_math to be disabled due to its use of a floating-point add operation.
In Details
This commit modifies the machine description for x86 targets (sse.md) to allow vector round instructions (vrounds[sd], vrndscales[sdh]) to be used even when flag_trapping_math is set. The ISO 60559 standard permits these operations with ROUND_NO_EXC flags, which aligns with the behavior of vroundss executed multiple times. The exception is the round function itself, which uses a floating-point add and thus requires flag_trapping_math to be disabled to avoid potential 'inexact' exceptions.
- vectorization
- An optimization technique where a single instruction operates on multiple data elements simultaneously, using wide registers (e.g., SIMD extensions like SSE, AVX).
- trapping-math
- A compiler option that enables runtime trapping for floating-point exceptions such as invalid operation, division by zero, overflow, underflow, inexact result, and NaN.
- ISO 60559
- An international standard (also known as IEEE 754) that defines floating-point arithmetic, including formats, operations, and exception handling.
- vroundps
- An AVX instruction that rounds multiple packed single-precision floating-point values according to a specified rounding mode.