RISC-V: Allow RVV register overlap for vfw{add,sub,mul}.vf
RISC-V compiler now permits register overlap for wide floating-point vector instructions.
The RISC-V GCC backend now allows register group overlap for wide floating-point vector instructions, specifically vfwadd.vf, vfwsub.vf, and vfwmul.vf. This change aligns the handling of these instructions with their vector-vector counterparts (.vv) and leverages the Wvr constraint in the vector.md file, potentially enabling more efficient instruction scheduling.
In Details
This commit modifies config/riscv/vector.md to allow register group overlap for the RISC-V Vector (RVV) extension's wide floating-point instructions (vfwadd.vf, vfwsub.vf, vfwmul.vf). Previously, this overlap was only permitted for the vector-vector variants (.vv). The change leverages the Wvr (Wide Vector Register) constraint, which facilitates the use of overlapping register groups. This adjustment is expected to improve code generation efficiency for vectorized floating-point operations.
- RISC-V
- An open-standard instruction set architecture (ISA) based on Reduced Instruction Set Computer principles, widely used in embedded systems and increasingly in other domains.
- RVV
- RISC-V Vector extension. This extension provides support for SIMD (Single Instruction, Multiple Data) operations using vector registers.
- vfwadd.vf
- A RISC-V vector instruction for fused multiply-add operations on wide floating-point values. The '.vf' suffix typically indicates that the destination register is a vector register and the source operands are also vector registers.
- vfwsub.vf
- A RISC-V vector instruction for wide floating-point subtraction. The '.vf' suffix indicates vector register destinations and sources.
- vfwmul.vf
- A RISC-V vector instruction for wide floating-point multiplication. The '.vf' suffix indicates vector register destinations and sources.
- register group overlap
- A situation in vector processing where instructions might use register resources that partially or fully overlap, requiring careful management by the compiler to avoid data corruption or incorrect results.
- Wvr constraint
- A constraint used in GCC's target description files (e.g., vector.md) that specifies requirements for wide vector registers, enabling optimizations related to register usage.