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OCTOBER 6, 2026
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gcc/riscv Performance Win

RISC-V cost model adjusted for LO_SUM expressions

RISC-V backend increases cost of LO_SUM expressions to improve code generation.

The RISC-V GCC backend has slightly increased the cost associated with LO_SUM expressions. This adjustment aims to prevent the Common Subexpression Elimination (CSE) pass from unnecessarily preserving LO_SUM forms when alternative, equivalent values exist. By making LO_SUM costlier, the compiler is encouraged to eliminate them along with associated HIGH expressions, potentially leading to more optimized code.

In Details

The RISC-V backend's cost model in riscv.cc was updated to increment the cost of LO_SUM RTX expressions. This change addresses PR target/108031 by influencing CSE's decision-making. Previously, LO_SUM and a simple PLUS had equal cost, leading CSE to retain LO_SUM to avoid gratuitous RTL changes. Increasing LO_SUM's cost incentivizes its elimination, which often also removes the associated HIGH expression.

Filed Under: risc-voptimizationcost model