Refurbish xtensa 'adddi3' MD pattern for 64-bit addition
Improves xtensa's 64-bit addition pattern by handling carry propagation correctly.
This commit refactors the adddi3 Machine Description (MD) pattern for Xtensa to correctly handle 64-bit integer addition on 32-bit architectures. The original pattern struggled with carry propagation when the same register was used for operands and results. The updated pattern utilizes RTL instruction combination to perform the addition and carry check in parallel, resolving potential issues with intermediate assignments and ensuring correctness.
In Details
The Xtensa adddi3 MD pattern was updated to correctly handle 64-bit addition on 32-bit systems. Previously, it struggled with carry propagation when the destination register was also an operand, potentially requiring scratch registers. The new pattern leverages RTL's parallel construct to combine the addition and carry check (via geu), ensuring correctness without unnecessary register pressure.
- Machine Description (MD)
- A file used by GCC to describe the target machine's instruction set, including patterns for various operations and their corresponding assembly instructions.
- RTL
- Register Transfer Language, an intermediate representation used by GCC to represent code during optimization and code generation.
- adddi3
- An internal GCC name for a function that performs a 32-bit integer addition, often used as part of larger integer operations.
- carry propagation
- In integer addition, the process where a carry-out from one bit position is added to the next more significant bit position. Correctly handling carry is crucial for multi-precision arithmetic.