TUESDAY, AUGUST 4, 2026
risc-v Performance Win
RISC-V: Avoid synthesizing vector constants.
RISC-V vector constants are now loaded from memory instead of being synthesized.
This commit optimizes the handling of known-length vector constants on RISC-V by loading them directly from the constant pool instead of synthesizing them using multiple operations. This change addresses a performance issue where a redundant constant was being used, improving efficiency and reducing code size.
In Details
In riscv-v.cc, expand_const_vector now forces known-length vector constants (VLS) to memory. Previously, these were expanded using a stepped-pattern sequence (vid, shift, add) which was inefficient and used a different constant than what was ultimately stored in the constant pool.
For Context
- VLS
- Vector Length Specification. In the context of RISC-V vector extensions, this refers to constants whose size is explicitly defined.
- constant pool
- A section in a compiled program that stores constant values (like integers, floats, strings) used by the code. This avoids embedding them directly in the instruction stream.
- vid
- Vector Instruction Detail. Likely a RISC-V vector instruction used for generating sequences or patterns within a vector.