vect: Fix divmod pattern for SVE2
Corrected a divmod pattern in the vectorizer to properly handle signed and unsigned types with SVE2, resolving test case failures.
A bug in the vectorizer’s divmod pattern has been fixed, resolving failures in SVE2 test cases related to ceiling division and modulo operations. The issue stemmed from the add_code_for_floorceilround_divmod function incorrectly passing a shifted quotient instead of the remainder for some operations. Additionally, the pattern incorrectly used the IFN_DIV_POW2 instruction for unsigned types, despite it being defined only for signed types. These issues have been rectified to ensure correct vectorization for both signed and unsigned division/modulo operations.
In Details
This commit addresses two issues with the DIV_POW2 internal vectorization pattern when SVE2 is enabled. First, the add_code_for_floorceilround_divmod function was passing the shifted quotient as the remainder argument for certain divmod operations, leading to incorrect calculations. Second, the pattern used IFN_DIV_POW2 (defined only for signed types) even for unsigned types, causing miscompiles on unsigned test cases. The fix involves correcting the argument passed for the remainder and ensuring that IFN_DIV_POW2 is only invoked for signed types, aligning with its definition and re…
- Vectorizer
- A component of a compiler that automatically transforms loops and code sequences to use SIMD (Single Instruction, Multiple Data) or vector instructions for improved performance.
- SVE2
- Scalable Vector Extension 2, an enhancement to ARM's SVE instruction set, adding new instructions and capabilities.
- Divmod
- A combined operation that computes both the quotient and the remainder of a division.
- Pattern
- In compiler optimization, a specific code structure or sequence that the compiler recognizes and can transform into more efficient code or a specific machine instruction.
- IFN_DIV_POW2
- An internal GCC optimization pattern related to division by a power of two, likely using a specialized instruction.