AArch64: Add tune for zeroing SVE move
Introduces a new tuning option for AArch64 to prefer zeroing SVE move immediate over merging variants for performance.
A new tuning option, AVOID_MOVIMM_Z, has been added for AArch64 targets. This tune allows the compiler to choose between using a zeroing SVE move immediate instruction or a merging variant after zeroing the destination. The optimization is enabled on cores where the zeroing variant has been measured to be slightly faster, potentially improving performance for SVE operations. The change involves modifications to header files, machine description files, and tuning flag definitions.
In Details
This commit introduces TARGET_SVE_PREFER_ZEROING_MOVIMM to the AArch64 backend. It adds a new tuning flag, AVOID_MOVIMM_Z, in aarch64-tuning-flags.def. This tune controls whether to prefer a zeroing SVE move immediate instruction or the merging variant after zeroing the destination register. This split is performed after reload, and the tune is enabled on specific cores (e.g., Neoverse-V2) where measurements indicate a performance benefit, aiming to optimize SVE instruction sequences.
- AArch64
- The 64-bit ARM architecture, commonly used in mobile devices and servers.
- SVE
- Scalable Vector Extension for ARM, a feature that allows vector registers to vary in size.
- movi
- An instruction to move an immediate value into a register.
- merging variant
- In the context of SVE, a mode where the destination register is updated by merging with existing data, often controlled by a predicate.