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OCTOBER 6, 2026
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aarch64

aarch64: Fix vec_perm operand zeroness flags when swapping

Correctly swaps zeroness flags along with operands in vec_perm expansion for aarch64.

The aarch64_expand_vec_perm_const_1 function normalizes vector permutations by rotating indices and swapping operands. However, it incorrectly left the zero_op0_p and zero_op1_p flags pointing to the original operands’ zeroness status. This caused subsequent recognizers to read the wrong vector, leading to incorrect results, such as zero vectors being returned when they shouldn’t be. The fix ensures these flags are swapped along with the operands, resolving PR126597.

In Details

When normalizing vector permutation constants (vec_perm) on aarch64, aarch64_expand_vec_perm_const_1 swaps the operands op0 and op1 and rotates the permutation indices. It also maintains boolean flags zero_op0_p and zero_op1_p indicating if the original operands were all zeros. This commit corrects an issue where these flags were not swapped along with the operands, causing downstream instruction selection (e.g., aarch64_evpc_and) to incorrectly use the zeroness status of the original operands, impacting functionality as seen in the provided test case.

For Context
aarch64
The 64-bit ARM architecture, a popular processor architecture for mobile and server devices.
vec_perm
A vector permutation instruction, which rearranges elements within one or more vectors.
operand
A value or variable that an instruction operates on.
NEON
ARM's Advanced SIMD (Single Instruction, Multiple Data) architecture extension for accelerated media and signal processing.
Filed Under: aarch64vectorcompileroptimization