aarch64: name the saturating narrow patterns after the sstrunc and ustrunc optabs
Improves vectorization of saturating narrowing operations on AArch64 by correctly naming patterns.
Vectorization of saturating narrowing operations on AArch64 has been improved by correctly naming the relevant patterns. Previously, the backend lacked the necessary sstrunc or ustrunc optabs, causing saturating narrowing loops to be vectorized inefficiently using clamps and permutes. This commit adds the expander and ensures the patterns match correctly, reducing the instruction count for such operations.
In Details
The vect_recog_sat_trunc_pattern on AArch64 was not recognizing saturating narrowing operations because the target lacked specific sstrunc/ustrunc optabs for the relevant modes. Although AArch64's aarch64_<su>qmovn<mode> RTL already matched these operations, the pattern recognition failed. This change introduces a new mode attribute (vnarrowq) and code attribute (sat_trunc_op) and an expander in aarch64-simd.md to correctly identify and vectorize these operations, preventing inefficient fallbacks.
- AArch64
- The 64-bit ARM architecture, commonly used in mobile devices and servers.
- vectorization
- An optimization technique where a single instruction is used to perform the same operation on multiple data points simultaneously, often using SIMD (Single Instruction, Multiple Data) instructions.
- saturating narrowing
- An operation that narrows the data type of a value (e.g., from 16-bit to 8-bit) and clamps the result to the maximum or minimum value of the target type if it exceeds the representable range.
- optabs
- Optimization tables in GCC that map operations and data types to specific machine instructions or RTL patterns.
- RTL
- Register Transfer Language, an intermediate representation used by GCC to represent code before it is translated into machine code.