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OCTOBER 6, 2026
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arc

arc: Add missing condition code clobbers to prevent incorrect code

Fixed ARC target by declaring missing condition code clobbers in instruction patterns, resolving incorrect code generation.

This commit addresses an issue in the ARC target architecture where several instructions (doloop_end, loop_end, dbnz, flag, kflag) incorrectly modified condition codes without declaring this side effect. Due to a recent change moving AArch64 CC fusion into late-combine, GCC now keeps condition codes live across these instructions, leading to wrong code generation. By adding the necessary CC clobber declarations to the instruction patterns, GCC correctly accounts for these side effects, fixing bugs like PR68185 for ARC60x and ARC700.

In Details

The ARC backend's instruction patterns for doloop_end, loop_end, dbnz, flag, and kflag were missing cc_memory or equivalent clobber annotations for condition codes (CC). Following the migration of aarch64-cc-fusion into late-combine in GCC, the compiler now attempts to preserve CC values across these instructions. This commit adds the appropriate clobbers to the relevant .md patterns to declare that these instructions modify the condition codes, thus preventing the compiler from incorrectly propagating stale CC values and generating wrong code, as reported in PR127191 and PR68…

For Context
ARC
A family of 32-bit RISC microarchitectures developed by DesignCore. GCC provides a backend for targeting ARC processors.
condition codes
Special bits in a processor's status register that record the outcome of comparison or arithmetic operations (e.g., zero, negative, carry). These are used by conditional branch instructions.
clobber
In compiler instruction descriptions, a clobber indicates that an instruction modifies a register or status flag, making its previous value invalid. The compiler must account for clobbered registers to maintain correctness.
instruction patterns
Templates used by the GCC backend to describe how high-level operations or abstract instructions map to specific machine instructions for a target architecture.
late-combine
A phase in the GCC compilation pipeline that performs optimizations by combining or modifying instructions after the initial code generation. Moving CC fusion into this phase can expose new optimization opportunities but also requires careful handling of instruction side effects.
PR127191
Problem Report number 127191, indicating a bug filed in the GCC bug tracking system.
Filed Under: gccarctargetbugfixcode-generation